A newly-designed integrated circuit (“IC”) is typically fabricated over a process of several weeks, involving preparation of silicon substrate wafers, generation of masks, doping of the silicon substrate, deposition of metal layers, and so on. The IC typically has various individual electronic components, such as resistors, capacitors, diodes, and transistors. The metal layers, which may be aluminum, copper, or other conductive material, provide the interconnection mesh between the various individual electronic components to form integrated electrical circuits. Vias formed of electrically conductive material often provide communication pathways between various metal layers. Contacts provide communication links between metal layer and individual electronic components.
Unfortunately, a new IC of any complexity rarely works as expected when first fabricated. Normally, some defects in the operation of the IC are discovered during testing. Also, some functions of the IC may operate properly under limited conditions, but fail when operated across a full range of temperature and voltage in which the IC is expected to perform. Once the IC has been tested, the designer may change the design, initiate the manufacture of a second prototype IC via the lengthy process described above, and then test the new IC once again. However, no guarantee exists that the design changes will correct the problems previously encountered, or that all of the problems in the previous version of the IC have been discovered.
Charged particle beam systems, such as focused ion beam (“FIB”) systems, have found many applications in various areas of science and industry. Particularly in the semiconductor industry, FIB systems are used for integrated circuit probe point creation, failure analysis, and numerous other applications. Moreover, FIB systems may be used to edit a circuit (“circuit editing”) to test design charges and thereby avoid some or all of the expense and time of testing design changes through fabrication. A FIB tool typically includes a particle beam production column designed to focus an ion beam onto the IC at the place intended for the desired intervention. Such a column typically comprises a source of ions, such as Ga+ (Gallium), produced from liquid metal. The Ga+ is used to form the ion beam, which is focused on the IC by a focusing device comprising a certain number of electrodes operating at determined potentials so as to form an electrostatic lens system. Other types of charged particle beam systems deploy other arrangements to produce charged particle beams having a desired degree of focus.
As mentioned above, IC manufacturers sometimes employ a FIB system to edit the prototype IC, thereby altering the connections and other electronic structures of the IC. Circuit editing involves employing an ion beam to remove and deposit material in an IC with precision. Removal of material, or milling, may be achieved through a process sometimes referred to as ion sputtering. Addition or deposition of material, such as a conductor, may be achieved through a process sometimes referred to as ion-induced deposition. Through removal and deposit of material, electrical connections may be severed or added, which allows designers to implement and test design modifications without repeating the wafer fabrication process.
One particular problem in conventional circuit editing involves forming a connection with semiconductor electronic components, such as a connection with the n-diffusion or p-diffusion regions of a semiconductor transistor structure. Platinum or Tungsten based conductors are typically employed to form a conductive path during circuit editing procedures. In conventional FIB-based deposition processes, these conductors form good contacts with metal layers, but form poor, typically rectifying contacts, with semiconductor electronic components. This problem is alleviated to some extent when circuit editing is performed through the top side of a chip, i.e., through the metal layers, where metal to semiconductor connections are already available to form conductive contacts. During the IC fabrication process, the contact directly to the semiconductor material is enabled through an anneal, which forms silicide that couples the semiconductor material to the metal conductor. Silicide is desired because it provides a good electrical contact, not rectifying but ohmic, between the semiconductor structure and metal interconnections.
Due to the increasing density of metal interconnections and number of metal layers, FIB based circuit editing through the topside of an IC is increasingly difficult. It is often the case that FIB milling to define access holes to reach a deep metal layer in the semiconductor structure would damage or destroy other structures or layers along the way. To avoid this, increasingly, FIB circuit editing is performed through the backside silicon substrate of the chip. While going through the backside allows a virtually unimpeded connectivity to the desired locations, there is no preexisting metal to which a conductor may be attached. A conventional approach for creating an ohmic contact between a probe or conductor or semiconductor structure during fabrication is to anneal the contact area; however, conventional fabrication annealing is not feasible if the IC has already been fabricated because the anneal temperature would damage or destroy the temperature-sensitive components.
Thus, the efficiency and potential of FIB-based circuit editing techniques are limited by the difficulty or impossibility in forming contacts with various semiconductor structures using conventional post-fabrication techniques.